(SEM VI) THEORY EXAMINATION 2017-18 INTEGRATED CIRCUITS

Integrated Circuits (NEN-603)

Complete Section-Wise Explanation – B.Tech Semester VI

Introduction to the Subject

Integrated Circuits (ICs) form the heart of modern electronics. This subject focuses on analog and digital IC design concepts, covering operational amplifiers, timers, PLLs, DACs, filters, multivibrators, logic circuits, and CMOS design techniques.

The paper evaluates your understanding of:               Op-amp characteristics and applications

Active filters and signal processing circuits                 Timer IC (555) and PLL

Data converters (DAC)                                                  CMOS logic design and flip-flops

Wave shaping circuits like Schmitt triggers and multivibrators

Analog IC blocks such as current mirrors and multipliers

The question paper is divided into three sections: A, B, and C.

SECTION A – Conceptual Fundamentals (Short Answer)

Pattern:
Attempt all questions
10 questions × 2 marks = 20 marks

Nature of Section A

Section A checks your core understanding and definitions. Answers should be brief but conceptually correct. Diagrams should be neat wherever asked.

Explanation of Section A Questions

CMOS NAND vs CMOS NOR
CMOS NAND is preferred because it offers lower power consumption, better switching speed, and smaller transistor sizes compared to CMOS NOR for the same logic function.

Capture Range in PLL
Capture range is the range of input frequencies over which the PLL can acquire lock starting from an unlocked condition.

Hysteresis Voltage
Hysteresis voltage is the difference between upper and lower threshold voltages in a Schmitt trigger, providing noise immunity.

Current Mirror and Current Steering
A current mirror copies a reference current into another branch, ensuring constant current. Current steering refers to directing current between different paths based on control signals.

8-bit DAC Numerical
This question tests resolution and binary weighting concepts. Each bit represents a specific voltage step based on DAC resolution.

Generalized Impedance Converter (GIC)
A GIC simulates inductance using op-amps, resistors, and capacitors, allowing inductors to be replaced in IC design.

Coupling Capacitor (Cc) in IC 741
The coupling capacitor blocks DC and allows AC signals to pass between amplifier stages, maintaining proper biasing.

Advantages of Widlar Current Source
Widlar current source provides low output current and improved temperature stability compared to basic current mirrors.

Master-Slave D Flip-Flop
This flip-flop uses two latches to eliminate race-around condition, ensuring output changes only on clock edge.

Narrow Band Pass Filter Design
This question checks understanding of filter parameters like center frequency, quality factor (Q), and gain.

SECTION B – Design & System-Level Understanding

Pattern:
Attempt any three questions
3 × 10 marks = 30 marks

Nature of Section B

This section requires detailed explanations, derivations, and designs. Proper block diagrams, transfer functions, and step-by-step reasoning are essential.

Explanation of Section B Questions

KHN Biquad Filter

This question involves deriving voltage gain expressions and transfer functions. The KHN filter can simultaneously provide low-pass, band-pass, and high-pass outputs using a single circuit. Understanding feedback paths is critical.

IC 555 Timer

The internal block diagram of 555 includes comparators, flip-flop, discharge transistor, and voltage divider.
In astable multivibrator design, timing resistors and capacitor determine frequency and duty cycle. The numerical part tests design accuracy.

Wideband Pass Filter Design

This question checks filter design skills by combining high-pass and low-pass stages. Gain, cut-off frequencies, and component selection must be clearly explained.

CMOS AOI and OAI Gates

You must derive truth tables and then implement logic using CMOS pull-up and pull-down networks. This tests understanding of logic realization and transistor-level design.

Phase Locked Loop (PLL)

PLL consists of phase detector, low-pass filter, and voltage-controlled oscillator. Its working involves frequency and phase synchronization. Applications include FM demodulation, frequency synthesis, and clock recovery.

SECTION C – Applications, Design & Analysis

Pattern:
Attempt any one part from each question
5 questions × 10 marks = 50 marks

This section has the highest weightage and determines overall performance.

Question 3

Slew Rate and Gain-Bandwidth Relation

Slew rate defines the maximum rate of change of output voltage. The relationship between unity gain bandwidth (ft) and slew rate for IC 741 is derived using sinusoidal response.

Weighted Resistor DAC

This DAC uses resistors weighted in powers of two. The explanation includes circuit diagram, working principle, and resolution analysis.

Question 4

Log Amplifier

A log amplifier produces an output proportional to the logarithm of input signal. It is widely used in signal compression, multiplication, and analog computation.

CMOS Logic Using NAND Gates

This problem involves logic simplification, truth table formation, Boolean expression derivation, and final CMOS NAND-only realization.

Question 5

Precision Rectifier

Unlike ordinary rectifiers, precision rectifiers eliminate diode drop error. The expression for output voltage during positive half cycle is derived using op-amp principles.

Gilbert Cell Multiplier

The Gilbert multiplier performs analog multiplication using differential pairs. It is widely used in mixers, modulators, and communication systems.

Question 6

Clocked SR Flip-Flop (CMOS)

This explains gated operation of SR flip-flop using CMOS transmission gates and clock control.

Op-Amp Monostable Multivibrator

The circuit produces a single pulse for each trigger. Time period derivation involves RC charging equation and comparator thresholds.

Question 7

Waveform Analysis Circuit

This question tests your ability to interpret a given circuit and sketch output waveforms with proper explanation.

Schmitt Trigger Design

An inverting Schmitt trigger is designed using op-amp with given hysteresis limits. Calculations involve resistor selection based on threshold voltages.