THEORY EXAMINATION (SEM–VI) 2016-17 INTEGRATED CIRCUIT TECHNOLOGY

INTEGRATED CIRCUIT TECHNOLOGY (NEC603)

SECTION – A

(Attempt All | 10 × 2 = 20 Marks)

(a) Uses of Silicon Dioxide (SiO₂)

Silicon dioxide is used as an insulating layer, diffusion mask, surface passivation layer, and gate oxide in MOS devices.

(b) Point, Frankel and Schottky Defects

Point defect: Missing or extra atom at a lattice point.

Frankel defect: An atom leaves its lattice position and occupies an interstitial site.

Schottky defect: Pair of missing cation and anion maintaining electrical neutrality.

(c) Pre-Oxidation Cleaning

Pre-oxidation cleaning removes organic contaminants, metal ions, and native oxide from silicon wafers before oxidation to ensure uniform oxide growth.

(d) Epitaxy

Epitaxy is the process of growing a single-crystal layer on a single-crystal substrate, where the grown layer follows the crystal orientation of the substrate.

(e) Ion Implantation

Ion implantation is a process in which high-energy ions are accelerated and embedded into the semiconductor to control doping concentration and depth.

(f) Diffusion Equation

The diffusion equation at distance x and time t is:

C(x,t)=QπDte−x24DtC(x,t) = \frac{Q}{\sqrt{\pi Dt}} e^{-\frac{x^2}{4Dt}}C(x,t)=πDt​Q​e−4Dtx2​

where D is diffusion coefficient.

(g) Total Stopping Power

Total stopping power is the rate of energy loss per unit path length of an ion as it travels through the target material.

(h) Performance Parameters of Projection Printer

Key performance parameters include:                     Resolution

Overlay accuracy                                                      Throughput

Depth of focus

(i) Principle of Mass Separation

Mass separation works on the principle that ions with different mass-to-charge ratios follow different trajectories in electric or magnetic fields.

(j) Ion Source Contains

An ion source consists of:                                         Gas inlet

Ionization chamber                                                   Extraction electrodes

Filament or plasma source

SECTION – B

(Attempt Any Five | 5 × 10 = 50 Marks)

(a) Electronic Grade Silicon & Polishing Process

Electronic grade silicon is obtained by purifying metallurgical grade silicon using zone refining. It has extremely high purity (99.9999%).

Polishing Process:
After slicing, wafers undergo lapping, chemical etching, and chemical-mechanical polishing to obtain a smooth, damage-free mirror surface.

(b) Need for Cleaning of Silicon Wafer & Crystal Structure

Cleaning is necessary to remove dust, organic contaminants, metals, and oxides, which otherwise degrade device performance.

Silicon has a diamond cubic crystal structure with each atom covalently bonded to four neighboring atoms.

(c) Silicon on Insulator (SOI) & Epitaxial Defects

SOI consists of a thin silicon layer separated from the substrate by an insulating oxide layer.

Advantages: reduced parasitic capacitance, high speed, low power.
Epitaxial defects: stacking faults, dislocations, and autodoping defects.

(d) Plasma Oxidation Technique & Applications of SiO₂

Plasma oxidation uses oxygen plasma to grow oxide at lower temperatures.

Applications of SiO₂:

Gate dielectric

Field oxide

Masking layer

Surface protection

(e) Effect of Impurities and Damage on Oxidation Rate

Impurities like boron increase oxidation rate, while arsenic reduces it. Crystal damage increases oxidation due to enhanced diffusion paths.

(f) Lithography

Lithography transfers geometric patterns onto wafers using photoresist and masks.
Steps include wafer cleaning, resist coating, exposure, development, and etching.

(g) Layout of Ion Implantation Equipment

Ion implantation system consists of:

Ion source                                           Mass analyzer

Accelerator                                          Beam focusing system

Target chamber

(h) Gaseous and Liquid Diffusion Systems

In gaseous diffusion, dopants are introduced in vapor form, while liquid diffusion uses liquid dopant sources. Gaseous systems offer better uniformity and control.

SECTION – C

(Attempt Any Two | 2 × 15 = 30 Marks)

3(a) Shaping Operations in Wafer Preparation

Wafer preparation involves crystal growth, ingot shaping, slicing, lapping, etching, and polishing. These operations ensure proper thickness, flatness, and surface quality.

3(b) Molecular Beam Epitaxy (MBE)

MBE is a high-vacuum epitaxial growth technique where molecular beams deposit atoms layer-by-layer on a heated substrate, allowing precise thickness and composition control.

4(a) Vacuum Deposition

Vacuum deposition involves depositing thin films by evaporation or sputtering under high vacuum. It provides high-purity and uniform films.

4(b) Charges in Oxidation Layer                   Charges present include:

Fixed oxide charge                                        Mobile ionic charge

Interface trapped charge                               Oxide trapped charge

These charges affect threshold voltage and device reliability.

5(a) Silicon Nitride and Deposition Variables

Silicon nitride is used as an oxidation mask and passivation layer.

Deposition variables:
Temperature, gas flow rate, pressure, and RF power (in plasma deposition).

5(b) Monolithic and Hybrid Integrated Circuits

Monolithic IC: All components fabricated on a single silicon chip.

Hybrid IC: Discrete components assembled on a substrate.

Monolithic ICs offer reliability and compact size, while hybrid ICs allow flexibility.