(SEM III) THEORY EXAMINATION 2020-21 DIGITAL SYSTEM DESIGN

This document is a B.Tech (Semester III) Theory Examination Question Paper for the subject Digital System Design (Subject Code: KEC302), conducted under Dr. A.P.J. Abdul Kalam Technical University (AKTU) for the academic session 2020–2021. The exam duration is 3 hours and carries a total of 100 marks, covering fundamental and advanced concepts of digital electronics and system design.

The paper is divided into multiple sections, each designed to test different levels of understanding—from basic conceptual knowledge to analytical thinking, problem-solving, and circuit design skills.

SECTION A – Short Answer Questions (10 × 2 = 20 Marks)

This section contains ten brief questions, each worth 2 marks, meant to test foundational understanding of digital electronics.
Topics include:

Designing a full adder using logic gates

Understanding setup and hold time in sequential circuits

Differentiating latches vs. flip-flops

Comparing Ripple Carry Adder vs. Carry Look-Ahead Generator

Calculating number of flip-flops for a 32-bit register

Understanding the concept of a barrel shifter

Identifying universal gates

Distinguishing between combinational and sequential circuits

Converting binary to Gray code

Designing a 4:1 multiplexer using 2:1 multiplexers

These questions test clarity of definitions and understanding of fundamental digital principles. 

SECTION B – Detailed Questions (Attempt Any Three × 10 Marks)

This is an analytical/problem-solving section that evaluates a deeper understanding of number systems, Boolean algebra, sequential circuits, and logic design.

Topics include:

Number system conversions (Hex, Decimal, Octal, Binary)

K-map simplification to derive minimum POS expression

De Morgan’s Theorem (statement and proof)

JK Flip-Flop state table, state diagram, and state equation

Designing a BCD adder using two 4-bit adders

These questions involve calculations, derivations, and logical reasoning, ensuring students understand both theory and application. 

SECTION C – Circuit Working & CMOS Concepts (10 Marks)

Students must choose one of the following:

Working of two-input TTL NAND gate with neat diagram

Working of CMOS components (inverter, NAND, NOR)

This section evaluates understanding of internal hardware architecture, circuit-level transistor behavior, switching, and logic implementation. 

SECTION D – Digital Logic Concepts (10 Marks)

This section focuses on key device parameters and FSM design:

Definitions of threshold voltage, propagation delay, power dissipation, fan-in, fan-out

Discussing Mealy and Moore FSM, along with the concept of excitation table

Students must show conceptual clarity and ability to differentiate between similar digital logic concepts. 

SECTION E – ADC (Analog to Digital Converter) Operation (10 Marks)

Questions include:

Detailed explanation of Flash ADC

Working of Successive Approximation ADC, along with merits and demerits

This tests understanding of analog-to-digital conversion techniques used in modern electronics. 

SECTION F – Sequential Circuit & Counter Design (10 Marks)

Students choose between:

Designing a sequential circuit with flip-flops exhibiting specific state transitions

Explaining 4-bit Johnson counter with diagram and waveform

These require design thinking, timing understanding, and waveform analysis. 

DIGITAL-SYSTEM-DESIGN-KEC-302-1

SECTION G – Up/Down Counter & DAC (10 Marks)

This final section includes:

Designing a synchronous 3-bit up/down counter using JK flip-flops

Explaining the working of R–2R DAC

These problems test advanced design skills, logical construction, and understanding of digital-to-analog conversion. 

Overall Summary

This AKTU question paper thoroughly evaluates student knowledge in Digital System Design, covering core topics such as logic gates, combinational circuits, sequential circuits, number systems, ADC/DAC systems, FSMs, counters, and CMOS behavior. It is structured to test:

Basic concepts

Logical reasoning

Circuit design capability

Problem-solving skills

Understanding of hardware architecture

The paper reflects the typical AKTU exam pattern—balanced, comprehensive, and designed to assess theoretical knowledge and practical understanding of digital electronics.