SEM III THEORY EXAMINATION 2017-18 DIGITAL LOGIC DESIGN

This document contains the complete B.Tech Semester III – Theory Examination 2017–18 question paper for Digital Logic Design (REC-301). The paper consists of 2 printed pages, carries 70 marks, and evaluates a student’s understanding of digital circuits, number systems, Boolean algebra, sequential and combinational logic, registers, counters, and hardware design concepts. 

Section A — Short Conceptual Questions (14 Marks)

Section A contains seven brief questions that test fundamental principles of digital logic:

Advantages of digital systems over analog

Excitation table and characteristic equation of a JK flip-flop

Difference between combinational and sequential circuits

Base-6 addition: (33)6+(45)6(33)_6 + (45)_6(33)6​+(45)6​

Implementing Boolean expression using NAND gates only

Converting numbers from base-7 and base-8 to decimal

Understanding the race-around condition in JK flip-flops

These questions evaluate foundational knowledge of digital design and logic fundamentals.

Section B — Descriptive & Design-Based Questions (21 Marks)

Section B requires students to attempt any three questions. These focus on Boolean simplification, circuit design, and logic implementation:

Simplification of a Boolean function using a K-map

Designing a three-input combinational circuit based on bit-sum logic

Implementing a Boolean function using an 8:1 multiplexer

Drawing & explaining PISO (Parallel In Serial Out) and PIPO (Parallel In Parallel Out) registers

Designing a 4-bit × 3-bit binary multiplier

This section tests diagram drawing skills, logic simplification ability, and understanding of hardware structures.

Section C — Advanced Logic, Sequential Systems & Counters (35 Marks)

Students must attempt one part from each grouped question. These questions cover advanced digital design concepts:

1. Shift Registers & Error Detection

Designing a universal shift register (HOLD, SHIFT RIGHT, SHIFT LEFT, LOAD)

Hamming code generation for the word 11011, error insertion, and error detection method

2. Comparators & Adders

Drawing a 4-bit magnitude comparator

Designing a BCD decimal adder

3. Logic Gate Internals

Operation of an RTL NOR gate

Operation of a TTL NAND gate

4. Sequential Logic Design

Drawing logic diagram, transition table, and output map for a given asynchronous circuit

Designing a 3-bit up/down ripple counter

5. Memory & State Machines

Short notes on RAM and PLA

Deriving state table and state diagram for a given synchronous sequential circuit

These questions test a student’s capability to design, analyze, and interpret advanced digital circuits and sequential systems.

Summary

This exam paper thoroughly assesses student competency across:

Number systems & conversions

Boolean algebra & logic gate implementation

Combinational logic circuits

Sequential circuits (flip-flops, registers, counters)

Error detection coding (Hamming)

Hardware structures (multiplexers, comparators, gates)

State machines & asynchronous logic

It is an essential academic resource for understanding the fundamentals of digital electronics and logic design.