(SEM IV) THEORY EXAMINATION 2023-24 NETWORKS ANALYSIS & SYNTHESIS

This document is a B.Tech (Semester IV) Theory Examination Question Paper for the subject BEE403 – Networks Analysis & Synthesis, conducted in the academic session 2023–2024.
It is a 3-hour, 70-mark exam designed to evaluate the student’s understanding of electrical network theorems, graph theory, transient analysis, network functions, two-port parameters, and network synthesis methods.

The exam is divided into three major sections—A, B, and C—covering short theory questions, analytical problems, and advanced synthesis questions.

SECTION A – Short Answer Questions (14 Marks)

Seven 2-mark questions covering foundational topics:

Concept of Isomorphism in graph theory

Difference between Tree and Co-tree

Maximum Power Transfer Theorem

Definition of natural response & forced response in transient circuits

Condition of reciprocity & symmetry in Z and h parameters

Concept of Poles & Zeros in network functions

Definition & properties of Positive Real (PR) functions

This section tests essential definitions and conceptual clarity.

SECTION B – Intermediate Numerical & Conceptual Problems (21 Marks)

Students must attempt any three of the following:

a. Definitions in Graph Theory

Branch, Graph, Node, Planar vs Non-planar, Loop

b. Norton Equivalent Circuit

Determination of Norton equivalent across terminals a–b (diagram on page 1)

c. Transient RL Circuit

Switch initially at position 1 for a long time, moved to position 2 at t=0

Find i(t) in the RL network (diagram shown)

d. t-parameters Calculation

Given network, evaluate t-parameters

e. Foster-I Network Synthesis

Synthesize circuit for
Y(s) = s² + 2s / (s² + 4s + 3)

This section evaluates transient analysis, theorems, graph theory basics, and synthesis methods.

SECTION C – Advanced Analysis & Synthesis (28 Marks)

Each question contains two subparts; students must attempt one from each.

3. Graph Theory & Incidence Matrices

(a) Incidence matrix + Cut-set matrix for given graph

(b) Oriented graph + Incidence matrix, Tie-set matrix, Cut-set matrix (with diagram)

4. Network Theorems (Numerical)

(a) Superposition theorem: current through 4Ω resistor

(b) Thevenin’s theorem: current through 20Ω resistor

5. Transient RC/RL Analysis

(a) Derive capacitor voltage Vc(t) for RC network and inductor current IL(t) for RL network

(b) Find i(t) when switch opens at t=0 for the given RL network

6. Two-Port Networks & Driving-Point Impedance

(a) Find Z-parameters and check reciprocity & symmetry

(b) Determine driving-point impedance of the LC network shown

7. Network Synthesis & Filter Analysis

(a) Synthesize the network using Foster-II form:
Z(s) = s (s² + 4) / [2 (s² + 1)(s² + 9)]

(b) Explain frequency response & transfer function of passive low-pass and high-pass filters

This section tests advanced graph theory, network theorems, transient behavior, two-port parameters, and synthesis techniques like Foster forms.

Overall Purpose of the Document

This exam paper evaluates complete competency in:

Graph theory (trees, incidence matrices, tie-sets, cut-sets)

Network theorems: Thevenin, Norton, Superposition

Electrical transient analysis (RC/RL circuits)

Network functions: poles, zeros, PR functions

Two-port networks (Z-parameters, reciprocity, symmetry)

Network synthesis (Foster forms)

Frequency response of passive filters

It includes theoretical definitions, numerical circuit problems, diagram-based questions, and analytical derivations—ensuring a rigorous evaluation of the subject.