(SEM IV) THEORY EXAMINATION 2018-19

INTRODUCTION TO MICROPROCESSOR – B.Tech (Semester IV), REC-405

This is a 3-hour, 70-mark theory examination focusing on microprocessor fundamentals, assembly programming, memory interfacing, instruction cycles, interrupts, and peripheral devices.
The paper is divided into three major sections: conceptual, descriptive, and detailed analytical/programming questions.
 

SECTION A — Short Answer Questions (2 × 7 = 14 Marks)

This section tests quick conceptual knowledge of 8085/8086 microprocessors.

Topics include:

Function of accumulator                           Memory chip requirement calculation

CALL & RET instructions                           HOLD and HLDA pin functions

Logical vs physical address                       Flag register of 8086

Meaning of pipelining

These questions evaluate definitions, basic hardware concepts, and instruction-level understanding.
 

SECTION B — Descriptive Questions (7 × 3 = 21 Marks)

Attempt any 3 out of 5.
This section evaluates knowledge of programming, microprocessor evolution, counters, timing delays, and peripheral chips.

Topics include:

Evolution & generations of microprocessors

Assembly program to load, subtract, convert to magnitude, and output via PORT1

Counters & delay generation using register pairs

BCD addition assembly program

Modes of operation of 8254/8253 programmable timer

These questions test programming logic, architecture understanding, and peripheral device usage.
 

 SECTION C — Long Answer Questions (7 marks each)

Each question offers a choice (a or b).
These are deep, diagram-based and program-based questions requiring strong conceptual understanding.

Q3 – Memory Interfacing & Architecture

Interfacing 8 KB EPROM with 8085 using 2K × 8 chips + address decoding

Architecture of 8085 with programmer’s model

Q4 – Instruction Cycle & Instruction Set

Timing diagram of opcode fetch cycle

Classification of instruction set of 8085 with examples & explanations

Q5 – Interrupts & Delay Calculations

Classification of interrupts, hardware & software interrupts in 8085

16-bit count calculation to generate 2-second delay using loops

Q6 – Assembly Language Programs

Converting binary to ASCII-Hex (XX20H → XX30H, XX31H)

Converting BCD (56 BCD) to binary (XX50H → XX60H)

Q7 – Peripheral Interface & 8086 Architecture

8259 Programmable Interrupt Controller block diagram + ICWs

Architecture of 8086 + physical address calculation (CS=9105H, IP=1724H)

These questions test in-depth knowledge of microprocessors, addressing techniques, cycles, peripheral ICs, and program execution flow.
 

OVERALL PURPOSE OF THE EXAM

This question paper examines whether a student can:

Understand 8085/8086 architectures

Write and analyze assembly language programs

Perform memory interfacing and address decoding

Use timing diagrams & instruction cycles properly

Work with interrupts and programmable devices (8259, 8253/54)

Apply delay generation, arithmetic operations, BCD/binary conversions

Calculate memory requirements and physical addresses

This ensures strong foundational skills in microprocessor systems, essential for embedded systems, IoT, robotics, and digital electronics.