(SEM IV) THEORY EXAMINATION 2017-18 INTRODUCTION TO MICROPROCESSOR

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B.Tech – Semester IV | Total Marks: 70 | Time: 3 Hours

This question paper evaluates a student’s understanding of 8085 microprocessor architecture, instruction set, programming techniques, interfacing concepts, timing diagrams, addressing modes, stack operations, interrupts, and peripheral ICs like 8255, 8254, and 8259.

It is divided into three sections
 Short concepts (A)
 Medium descriptive questions (B)
 Long analytical/programming questions (C)

SECTION A — Short Answer Questions (2 × 7 = 14 Marks)

This section contains 7 brief questions covering fundamental microprocessor concepts.

Topics include:

Logic devices used for interfacing                                   ALE (Address Latch Enable) signal

Looping & counting programming techniques              Difference between RLC and RAL instructions

Subroutines & multiple calling                                       Operating modes of 8254/8253 timer

Function of DMA controller

These questions check basic definitions + control signals + programming fundamentals.
 

SECTION B — Descriptive Questions (7 × 3 = 21 Marks)

Attempt ANY 3 out of 5.

Topics include:

(a) 8085 block diagram

Functional units, signals                   Programming model                   Flag register bits explained

(b) 8085 Interfacing

Interfacing 8-DIP switches (input)   Interfacing 7-segment display (output)

(c) Interrupts of 8085

All interrupts                                    Vectored interrupts                      Interrupt vector addresses

(d) BCD addition

Concept + example

Assembly language program for adding 2 unsigned BCD numbers

(e) 8255 Programmable Peripheral Interface

Block diagram                                   Ports A, B, C                                 Modes of operation

This section tests architecture + interfacing + interrupts + assembly programming skills.
 

SECTION C — Long Analytical/Programming Questions (7 marks each)

Each question has two alternative choices (a or b).
These require diagram-based explanations, timing cycles, memory decoding, assembly programs, or peripheral controller descriptions.

Q3 — Op-Code Fetch & Address Decoding

(a) Opcode fetch cycle timing diagram
OR
(b) Absolute vs Partial decoding + design Read/Write control signals using IO/M’, RD’, WR’

Q4 — Addressing Modes / Instruction Classification

(a) Transfer F7H from 2050H using MOV, LDAX, LDA + explaining addressing modes
OR
(b) Classify instruction set of 8085 by function + list and explain instructions

Q5 — Looping Program / Stack Memory

(a) Flowchart + program for a zero-to-nine (mod-10) counter
OR
(b) Stack memory, stack pointer + conditional call/return instructions

Q6 — Multiplication Program / Register Instructions

(a) Program to multiply two numbers stored at 2050H & 2051H using a subroutine
OR
(b) Explain: XCHG, XTHL, SHLD, SPHL + program to subtract DE from BC

Q7 — 8259 PIC / 8086 Architecture

(a) Block diagram of 8259A + priority modes
OR
(b) BIU & EU of 8086 + register organization + TEST’, LOCK’ signals explained

These questions test programming, timing diagrams, memory interfacing, controller ICs & advanced architecture concepts.
]
OVERALL PURPOSE OF THE EXAM

This exam checks whether the student can:

Understand 8085 architecture, signals & timing cycles

Write assembly programs using loops, counters, stack, subroutines

Interface I/O devices (switches, displays)

Use interrupts & timers (8253/54)

Understand peripheral interfaces (8255, 8259)

Perform memory decoding & apply addressing modes

Compare 8085 vs 8086 architecture and signal-level operation

Use DMA controller concepts

It combines theory + programming + hardware interfacing + timing analysis, essential for embedded systems & microprocessor design.

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