Subject: Electronic Circuits (NEC402)
Exam Type: Theory
Semester: IV (4th Semester)
Session: 2016–17
Time: 3 Hours
Maximum Marks: 100
Section A – Short Answer Questions (10 × 2 = 20 Marks)
This section tests fundamental knowledge of operational amplifiers, transistor models, feedback, and oscillators.
Topics Covered:
Slew Rate Limitation:
Find the maximum gain of an op-amp with a given slew rate (0.4 V/µs) and input vi=0.03sin(1.5×105t)v_i = 0.03 \sin(1.5 × 10^5 t)vi=0.03sin(1.5×105t).
Integrator Circuit:
Draw circuit diagram and derive its output expression.
Key Op-Amp Parameters:
Define Slew Rate and CMRR (Common Mode Rejection Ratio).
BJT Models:
Draw Hybrid-π and T-model for an NPN transistor.
Barkhausen Criterion:
State the condition for sustained oscillation.
MOSFET Regions of Operation:
Explain triode and saturation operation for NMOS and PMOS transistors.
Negative Feedback:
Given amplifier gain and bandwidth, calculate new gain, bandwidth, and feedback ratio when restricted to 1 MHz.
Colpitts Oscillator:
Draw circuit, derive frequency equation, and state condition for oscillation.
Crystal Oscillator:
Explain its working principle.
BJT Internal Capacitances:
Identify and explain the effect of internal capacitances on frequency response
Section B – Descriptive / Analytical Questions (5 × 10 = 50 Marks)
This section tests detailed circuit analysis, small-signal modeling, and derivations related to amplifiers and oscillators.
Key Questions:
Inverting Amplifier:
Derive the expression for closed-loop gain assuming finite open-loop gain.
Series–Series Feedback Amplifier:
Analyze and derive gain, input resistance, and output resistance expressions.
RC Phase Shift Oscillator (Op-Amp Based):
Draw the circuit and derive the oscillation frequency and Barkhausen condition.
Hartley Oscillator & MOSFET Comparison:
(i) Explain the Hartley oscillator and its operation.
(ii) Differentiate between DMOSFET and EMOSFET devices.
Transistor Biasing Circuit:
Analyze a DC biasing circuit of an NPN transistor to derive the Q-point and stability factor.
MOS Differential Pair:
Perform small-signal analysis to determine differential and common-mode gain.
NMOS Operating Region Problem:
Given Vt=0.7VV_t = 0.7VVt=0.7V, VG=1.5VV_G = 1.5VVG=1.5V, find the operating region for
(a) VD=0.5VV_D = 0.5VVD=0.5V, (b) 0.9V0.9V0.9V, (c) 3V3V3V.
Also explain construction and working of an N-type enhancement MOSFET.
Common-Emitter Amplifier:
(i) Draw input and output characteristics.
(ii) List properties of an ideal op-amp (infinite gain, infinite input resistance, zero output resistance, etc.)
Section C – Long Analytical / Design Questions (2 × 15 = 30 Marks)
Questions Include:
Common Emitter Amplifier (Small-Signal Analysis):
Derive expressions for:
Input resistance Voltage gain (base to collector)
Overall voltage gain (source to load) Open-circuit voltage gain
Output resistance
Finite Loop Gain & Bandwidth Effects:
Explain how finite op-amp parameters affect amplifier performance.
Define input offset voltage and input offset current.
Feedback Topologies & LC Tank Circuit:
(i) Explain the four feedback topologies (Voltage–Series, Voltage–Shunt, Current–Series, Current–Shunt) with block diagrams.
(ii) Explain the operation of an LC tank circuit used in oscillators
Major Topics Covered
Operational Amplifiers (Ideal vs. Practical Parameters) Transistor models (Hybrid-π, T-model)
Feedback amplifier theory and derivations MOSFET structure and operation (enhancement/depletion types)
Oscillators (RC, Hartley, Colpitts, Crystal) Frequency response and stability analysis
Purpose of the Paper
This paper evaluates both theoretical understanding and analytical skills in designing and analyzing analog circuits.
It emphasizes feedback principles, amplifier performance, and oscillator design, serving as a foundation for advanced analog electronics and communication circuit design.
