Course: B.Tech (Semester V)
Subject Code: KEC053
Subject: VLSI Technology
Maximum Marks: 100
Time: 3 Hours
Pattern:
Section A: 10 short answer questions × 2 marks = 20 marks
Section B: Attempt any 3 × 10 marks = 30 marks
Section C (Q3–Q7): Each with 2 alternatives × 10 marks = 50 marks
SECTION A – Short Answer Questions (2 × 10 = 20 Marks)
a. Mention the advantages of Integrated Circuits (ICs).
b. Define Polishing.
c. What is Auto Doping in growth process?
d. What is Plasma Oxidation?
e. Explain Photo Mask.
f. What are PR (Photoresist) Materials?
g. Write the types of Diffusion.
h. Define Ion-Implantation.
i. Enlist different types of IC packages.
j. Write all Packaging Design Considerations.
SECTION B – Descriptive / Analytical Questions (Any 3 × 10 = 30 Marks)
a. Explain Electronic Grade Silicon with a neat diagram.
b. Discuss Vapor-Phase Epitaxy (VPE).
c. Explain in detail Optical Lithography.
d. Explain Fick’s Law of Diffusion.
e. Discuss Package Types and Packaging Design Considerations.
SECTION C – Long / Detailed Questions (Each 10 Marks)
Q3. Silicon Growth & Wafer Preparation
a. Explain Czochralski (CZ) Process in detail with a neat diagram.
What is the pull rate in the CZ technique?
b. Discuss different shaping operations used in wafer preparation, with a diagram.
Q4. Epitaxy & CMOS
a. Explain the principle of Molecular Beam Epitaxy (MBE).
b. What is Latch-Up? How is it avoided in CMOS technology?
Q5. Lithography & Deposition
a. Explain the kinetics of Wet Etching. How is gold etched?
b. Explain how Silicon Nitride is used. Describe its deposition variables.
Q6. Diffusion & Sheet Resistance
a. Define Sheet Resistance and describe a method for its measurement.
b. Discuss Gaseous and Liquid Diffusion Systems.
Q7. Metallization & Sputtering
a. Explain Metallization and describe the problems associated with this process.
b. What do you mean by Sputtering? Explain Sputtering Yield.
