(SEM V) THEORY EXAMINATION 2021-22 INTEGRATED CIRCUITS

INTEGRATED CIRCUITS (KEC-501)

B.Tech (Sem V) – Exam Notes & Solved Guide

SECTION A – Short Answer Type (2 Marks Each)

a. Matched Transistors
Matched transistors are transistors fabricated on the same IC with identical electrical characteristics such as current gain and threshold voltage. They improve accuracy and temperature stability.

b. Current Mirror Circuit & Need
A current mirror copies a reference current into another branch. It is needed to provide constant current biasing in IC circuits.

c. Slew Rate
Slew rate is the maximum rate of change of output voltage with respect to time.
Unit: V/µs.
It limits the high-frequency performance of an op-amp.

d. Quadrant Operation of Multiplier
Quadrant operation indicates the number of input signal polarities supported by a multiplier.
Four-quadrant multiplier handles both positive and negative inputs.

e. Frequency Response of Filter Circuit
Frequency response shows how the gain of a filter varies with frequency, defining passband and stopband.

f. Wide Band vs Narrow Band Pass Filter
Wide band filter has a large bandwidth, while narrow band filter has a small bandwidth and high selectivity.

g. Role of PDN in CMOS
Power Distribution Network (PDN) supplies stable VDD and GND to CMOS circuits and reduces noise.

h. Peak Detector vs Sample and Hold Circuit
Peak detector captures maximum input value, while sample and hold captures and holds instantaneous value.

i. Need of Voltage Limiter Circuits
Voltage limiters protect circuits from over-voltage and signal distortion.

j. Applications of PLL
PLL is used in frequency synthesis, FM demodulation, clock recovery, and motor speed control.

SECTION B – Descriptive Answers (10 Marks Each)

(a) Overall Gain of IC 741 & Relation between fT and Slew Rate

IC 741 consists of three stages: differential amplifier, voltage amplifier, and output stage.
Overall gain is the product of gains of all stages.
Relation:
fT = SR / (2πVp)
where SR is slew rate and Vp is peak output voltage.

(b) Generalized Impedance Converter (GIC)

A GIC uses op-amps and impedances to simulate inductors.
Its impedance depends on connected resistors and capacitors.
It is widely used where physical inductors are impractical.

(c) Temperature Compensated Log Amplifier

Uses two op-amps and matched transistors.
Temperature effects are cancelled, giving accurate logarithmic output.

(d) Clocked SR Flip-Flop Using NAND & CMOS Implementation

Clock controls input enabling.
CMOS implementation uses pull-up (PMOS) and pull-down (NMOS) networks to reduce power consumption.

(e) Phase Locked Loop (PLL)

PLL consists of phase detector, low-pass filter, and VCO.
Lock-in range is frequency range where PLL locks instantly.
Capture range is frequency range where PLL acquires lock gradually.

SECTION C – Long Answer Type

3(a) BJT Complementary Push-Pull Output Stage

Uses NPN and PNP transistors.
Provides high efficiency, reduced crossover distortion, and large output power.

3(b) Block Diagram of IC 741

IC 741 contains differential input stage, intermediate gain stage, and output buffer stage.
It offers high gain, good stability, and low noise.

4(a) Narrow Band Band Reject Filter

Rejects a narrow range of frequencies.          Transfer function shows minimum gain at notch frequency.

4(b) Active vs Passive Filters & Band Pass Filter Design

Active filters use op-amps and provide gain.       Passive filters use RLC components and provide no gain.
Band-pass filter is designed using given fL, fH, and gain relations.

5(a) Monostable Multivibrator Using Op-Amp

Produces single pulse output.                       Time period:
T = RC ln(1 + β)

5(b) Gilbert Multiplier

A four-quadrant analog multiplier using differential transistor pairs.
Provides accurate multiplication of analog signals.

6(a) CMOS Inverter, NAND & NOR Gates

CMOS inverter uses one PMOS and one NMOS.
NAND and NOR gates are realized by combining PMOS pull-up and NMOS pull-down networks.

6(b) Features of CMOS & D Flip-Flop

CMOS features low power consumption, high noise immunity, and high density.
D-FF stores data on clock edge using NAND CMOS gates.

7(a) IC 555 Astable Multivibrator

Frequency:
f = 1 / [0.693 (RA + 2RB) C]
Used for timers, oscillators, and pulse generation.

7(b) VCO (IC 566)

VCO output frequency varies with control voltage. Used in FM modulation and PLL systems.