(SEM V) THEORY EXAMINATION 2020-21 VLSI TECHNOLOGY

VLSI TECHNOLOGY (KEC053)

B.Tech (SEM-V) – AKTU

SECTION A

(Attempt all questions – 2 × 10 = 20 marks)

Q1 (a) Explain the terms SSI, MSI, LSI and VLSI.

SSI (Small Scale Integration) refers to ICs containing a few logic gates, typically up to 10 gates, used in simple circuits.

MSI (Medium Scale Integration) contains tens to hundreds of gates and is used for functions like counters and multiplexers.

LSI (Large Scale Integration) integrates thousands of gates on a single chip and is used in memory and microprocessors.

VLSI (Very Large Scale Integration) contains millions of transistors on a single chip and is used in modern processors and SoCs.

Q1 (b) Define the crystal structure of Silicon.

Silicon has a diamond cubic crystal structure. Each silicon atom is covalently bonded to four neighboring atoms in a tetrahedral arrangement. This structure provides high mechanical strength and good electrical properties, making silicon suitable for semiconductor devices.

Q1 (c) What are point defects?

Point defects are imperfections in the crystal lattice that occur at or around a single lattice point. Common point defects include vacancies, interstitials, and substitutional atoms. These defects affect electrical and diffusion properties of semiconductors.

Q1 (d) What is meant by annealing?

Annealing is a thermal process in which a semiconductor wafer is heated to a high temperature and then cooled slowly. It is used to repair crystal damage, activate dopants, and reduce internal stresses after diffusion or ion implantation.

Q1 (e) Mention cardinal rules for hetero epitaxy.

The lattice constants of substrate and epitaxial layer should be closely matched.
Thermal expansion coefficients should be similar to avoid stress.
Chemical compatibility between layers must be ensured.
Growth temperature should not damage the substrate.

Q1 (f) State the purpose of oxidation.

Oxidation is used to grow silicon dioxide on silicon wafers. This oxide layer acts as an insulator, mask for diffusion, surface passivation layer, and gate dielectric in MOS devices.

Q1 (g) Differentiate between positive and negative photoresist.

In positive photoresist, exposed areas become soluble and are removed during development.
In negative photoresist, exposed areas become insoluble and remain after development.

Q1 (h) Why is aluminum preferred for metallization?

Aluminum is preferred because it has low resistivity, good adhesion to silicon dioxide, easy patterning, and forms low-resistance ohmic contacts with silicon.

Q1 (i) Mention various packaging types available for IC fabrication.

Common IC packaging types include Dual In-Line Package (DIP), Quad Flat Package (QFP), Ball Grid Array (BGA), Small Outline IC (SOIC), and Chip Scale Package (CSP).

Q1 (j) What do you mean by SOI?

SOI (Silicon On Insulator) is a technology where a thin silicon layer is formed on an insulating substrate. It reduces parasitic capacitance, improves speed, and lowers power consumption.

SECTION B

(Attempt any three – 3 × 10 = 30 marks)

Q2 (a) Describe CZ process in detail and importance of inert ambient.

The Czochralski (CZ) process is used to grow single-crystal silicon ingots. High-purity polycrystalline silicon is melted in a quartz crucible. A seed crystal is dipped into the molten silicon and slowly pulled upward while rotating. This results in the formation of a large single crystal.

An inert ambient, usually argon, is used to prevent oxidation and contamination of molten silicon. It also controls evaporation and maintains purity of the crystal.

Q2 (c) Explain the process of e-beam lithography and its advantages.

E-beam lithography uses a focused electron beam to directly write patterns on an electron-sensitive resist. The electron beam scans the wafer according to the desired pattern. After exposure, the resist is developed and unwanted regions are removed.

Advantages include extremely high resolution, ability to create very fine patterns, and no need for masks. It is superior to optical lithography for nanoscale fabrication.

Q2 (d) State and derive diffusion equation for limited source diffusion.

Limited source diffusion occurs when a fixed amount of dopant is introduced. The diffusion equation is derived from Fick’s second law. The concentration profile follows a Gaussian distribution.

The diffusion profile shows maximum concentration at the surface which decreases with depth. This method is used for precise control of junction depth.

SECTION C

(Attempt any two – one from each unit, 2 × 10 = 20 marks)

Q3 (a) Explain production process of Electronic Grade Silicon from silica.

Electronic grade silicon is produced from silica (SiO₂). Silica is first reduced with carbon in an electric furnace to produce metallurgical grade silicon. This silicon is then purified by converting it into trichlorosilane and distilled to remove impurities.

The purified compound is decomposed to deposit high-purity silicon. This silicon is then used for crystal growth in CZ or FZ processes.

Q4 (b) What is ion implantation and why is it preferred over diffusion?

Ion implantation is a process in which dopant ions are accelerated and implanted into the semiconductor substrate. The depth and concentration are precisely controlled by ion energy and dose.

It is preferred over diffusion because it provides better control, lower temperature processing, sharper junctions, and compatibility with modern VLSI fabrication.