(SEM V) THEORY EXAMINATION 2017-18 COMPUTER ARCHITECTURE

COMPUTER ARCHITECTURE (NCS-505)

B.Tech | Semester V | Section-wise Important Questions & Notes

SECTION A – Very Short Answer (2 × 10 = 20 Marks)

This section focuses on definitions, basic concepts, and small numericals. Answers should be brief and precise.

Important Questions

What is synchronous and asynchronous communication?    Describe magnetic disk.

What is an instruction cycle?                                            Explain floating-point number representation.

Explain the concept of memory transfer.                         What are the types of registers?

Define bus arbitration and list its types.                           What is auxiliary memory?

What is vertical microprogramming?

Numerical: Number of 128×8 RAM chips required for 2048 bytes memory.

Key Notes

Instruction cycle = Fetch → Decode → Execute → Interrupt.

Auxiliary memory: Secondary storage like disks and tapes.

Bus arbitration controls access to system bus.

RAM chip numericals are very common in exams.

SECTION B – Long Theory & Numericals (Attempt Any 3)

This section tests organization, memory hierarchy, and cache concepts.

Important Questions

Explain General Register Organization with diagram.   What is an interrupt? Explain its types.

Explain cache memory organizations:                              Direct mapping

Associative mapping                                                         Set-associative mapping

Cache memory numerical based on:                                Tag, index, block, word fields

Cache block size and valid bit                                           Explain stack organization:

Register stack                                                                    Memory stack

Key Notes

Cache memory questions are high-weight.                    Draw clear diagrams for register organization.

Interrupts improve CPU efficiency.

SECTION C – Arithmetic & Memory Hierarchy (10 Marks)

Most Important Questions

Explain Booth’s Algorithm and solve multiplication using it.

Two-level memory hierarchy numerical:

Average cost per bit                         Average access time

Key Notes

Booth’s algorithm is frequently repeated.          Show step-by-step binary calculation.

Memory hierarchy numericals test formula understanding.